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RISCY BUSINESS»Episode Guide
2.7
References ▼
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Book Club (COAD)
[1]2:47
David Patterson & John Hennessy (Morgan Kaufmann)
Computer Organization and Design RISC-V Edition
[2]5:28[3]19:20[6]40:45
[8]53:40[11]1:10:01[12]1:13:14
[13]1:15:55[14]1:16:13[16]1:47:40
[17]2:04:56[19]2:08:59[20]2:11:30
[21]2:14:53[22]2:17:11[23]2:22:31
[24]2:23:14[25]2:27:22[26]2:27:46
[27]2:33:50[28]2:41:21
David Patterson and Andrew Waterman (Strawberry Canyon)
RISC-V Reader
[4]19:20[15]1:16:13
GitLab
hula /​ hello.S
[5]19:20
RISC-V
User-Level ISA Specification v2.2
[7]46:25
GNU Binutils
5.3 Symbol Names
[9]1:04:01
RISCY BUSINESS Forums
Useful Links
[10]1:04:01
Pointers Gone Wild
[18]2:05:32
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Neo Ar
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Matt Mascarenhas
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0:10Recap and set the stage for the day
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0:10Recap and set the stage for the day
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0:10Recap and set the stage for the day
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0:41Correct memory from yesterday that Per actually used XOR in his carry-lookahead implementation
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0:41Correct memory from yesterday that Per actually used XOR in his carry-lookahead implementation
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0:41Correct memory from yesterday that Per actually used XOR in his carry-lookahead implementation
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2:47Confirm that we did read the correct Burks paper1
2:47Confirm that we did read the correct Burks paper1
2:47Confirm that we did read the correct Burks paper1
5:28Chapter 2.7 Instructions for Making Decisions2
5:28Chapter 2.7 Instructions for Making Decisions2
5:28Chapter 2.7 Instructions for Making Decisions2
10:42A few words on flipping conditions when lowering code from a language like C to assembly
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10:42A few words on flipping conditions when lowering code from a language like C to assembly
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10:42A few words on flipping conditions when lowering code from a language like C to assembly
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14:20Structured control flow
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14:20Structured control flow
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14:20Structured control flow
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19:20Chapter 2.7 Example 1 - Compiling if-then-else into Conditional Branches3,4,5
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19:20Chapter 2.7 Example 1 - Compiling if-then-else into Conditional Branches3,4,5
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19:20Chapter 2.7 Example 1 - Compiling if-then-else into Conditional Branches3,4,5
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40:45Compare our answer to Chapter 2.7 Example 1 with the book6
40:45Compare our answer to Chapter 2.7 Example 1 with the book6
40:45Compare our answer to Chapter 2.7 Example 1 with the book6
46:25Consult the User-Level ISA Specification v2.27 to learn that the J instruction and the entire J-Type instruction format have been dropped
46:25Consult the User-Level ISA Specification v2.27 to learn that the J instruction and the entire J-Type instruction format have been dropped
46:25Consult the User-Level ISA Specification v2.27 to learn that the J instruction and the entire J-Type instruction format have been dropped
53:40Continue to compare our answer to Chapter 2.7 Example 1, critiquing their use of BEQ rather than JAL8
53:40Continue to compare our answer to Chapter 2.7 Example 1, critiquing their use of BEQ rather than JAL8
53:40Continue to compare our answer to Chapter 2.7 Example 1, critiquing their use of BEQ rather than JAL8
1:04:01Refer to the GAS documentation for our label syntax9,10
1:04:01Refer to the GAS documentation for our label syntax9,10
1:04:01Refer to the GAS documentation for our label syntax9,10
1:10:01Figure 2.9 - Illustration of the options in the if statement above11
1:10:01Figure 2.9 - Illustration of the options in the if statement above11
1:10:01Figure 2.9 - Illustration of the options in the if statement above11
1:13:14Chapter 2.7 Hardware / Software Interface 1, on a supposed benefit of writing in high level languages12
1:13:14Chapter 2.7 Hardware / Software Interface 1, on a supposed benefit of writing in high level languages12
1:13:14Chapter 2.7 Hardware / Software Interface 1, on a supposed benefit of writing in high level languages12
1:15:55Chapter 2.7 continued, Loops13
1:15:55Chapter 2.7 continued, Loops13
1:15:55Chapter 2.7 continued, Loops13
1:16:13Chapter 2.7 Example 2 - Compiling a while Loop in C14,15
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1:16:13Chapter 2.7 Example 2 - Compiling a while Loop in C14,15
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1:16:13Chapter 2.7 Example 2 - Compiling a while Loop in C14,15
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1:47:40Compare our answer to Chapter 2.7 Example 2 with the book16
1:47:40Compare our answer to Chapter 2.7 Example 2 with the book16
1:47:40Compare our answer to Chapter 2.7 Example 2 with the book16
2:04:56Chapter 2.7 Hardware / Software Interface 2, on basic blocks17
2:04:56Chapter 2.7 Hardware / Software Interface 2, on basic blocks17
2:04:56Chapter 2.7 Hardware / Software Interface 2, on basic blocks17
2:05:32Shout-out to Maxime Chevalier18 and her work on basic block versioning in just-in-time compilation
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2:05:32Shout-out to Maxime Chevalier18 and her work on basic block versioning in just-in-time compilation
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2:05:32Shout-out to Maxime Chevalier18 and her work on basic block versioning in just-in-time compilation
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2:08:59Chapter 2.7 Hardware / Software Interface 2 continued, on basic blocks19
2:08:59Chapter 2.7 Hardware / Software Interface 2 continued, on basic blocks19
2:08:59Chapter 2.7 Hardware / Software Interface 2 continued, on basic blocks19
2:11:30Chapter 2.7 continued, on equality testing20
2:11:30Chapter 2.7 continued, on equality testing20
2:11:30Chapter 2.7 continued, on equality testing20
2:14:53Chapter 2.7 continued, Bounds Check Shortcut21
2:14:53Chapter 2.7 continued, Bounds Check Shortcut21
2:14:53Chapter 2.7 continued, Bounds Check Shortcut21
2:17:11Chapter 2.7 Example 3 - Reducing an index-out-of-bounds check22
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2:17:11Chapter 2.7 Example 3 - Reducing an index-out-of-bounds check22
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2:17:11Chapter 2.7 Example 3 - Reducing an index-out-of-bounds check22
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2:22:31Compare our answer to Chapter 2.7 Example 3 with the book23
2:22:31Compare our answer to Chapter 2.7 Example 3 with the book23
2:22:31Compare our answer to Chapter 2.7 Example 3 with the book23
2:23:14Chapter 2.7 continued, Case / Switch Statement24
2:23:14Chapter 2.7 continued, Case / Switch Statement24
2:23:14Chapter 2.7 continued, Case / Switch Statement24
2:27:22Chapter 2.7 Hardware / Software Interface 3, on conditional branch25
2:27:22Chapter 2.7 Hardware / Software Interface 3, on conditional branch25
2:27:22Chapter 2.7 Hardware / Software Interface 3, on conditional branch25
2:27:46Chapter 2.7 Check Yourself 1 - "C has many statements for decisions and loops, while RISC-V has few. Which of the following does or does not explain this imbalance? Why?"26
2:27:46Chapter 2.7 Check Yourself 1 - "C has many statements for decisions and loops, while RISC-V has few. Which of the following does or does not explain this imbalance? Why?"26
2:27:46Chapter 2.7 Check Yourself 1 - "C has many statements for decisions and loops, while RISC-V has few. Which of the following does or does not explain this imbalance? Why?"26
2:33:50Chapter 2.7 Check Yourself 2 - "Why does C provide two sets of operators for AND (& and &&) and two sets of operators for OR (| and ||), while RISC-V doesn't?"27
2:33:50Chapter 2.7 Check Yourself 2 - "Why does C provide two sets of operators for AND (& and &&) and two sets of operators for OR (| and ||), while RISC-V doesn't?"27
2:33:50Chapter 2.7 Check Yourself 2 - "Why does C provide two sets of operators for AND (& and &&) and two sets of operators for OR (| and ||), while RISC-V doesn't?"27
2:41:21Chapter 2.7 Check Yourself Answers28
2:41:21Chapter 2.7 Check Yourself Answers28
2:41:21Chapter 2.7 Check Yourself Answers28
2:54:50That's the end of the chapter
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2:54:50That's the end of the chapter
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2:54:50That's the end of the chapter
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