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RISCY BUSINESS»Episode Guide
Understanding read_csr(mhartid)
References ▼
SiFive Developers
Freedom E310-G000 Manual
[1]8:07
RISC-V
User-Level ISA Specification v2.1
[2]13:17[4]39:56
RISC-V
Draft Privileged ISA Specification v1.9.1
[3]26:50
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Neo Ar
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Matt Mascarenhas
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0:06Set the stage for the day
0:06Set the stage for the day
0:06Set the stage for the day
0:42Read through plic.h
0:42Read through plic.h
0:42Read through plic.h
2:21Read through encoding.h, where we find read_csr()
2:21Read through encoding.h, where we find read_csr()
2:21Read through encoding.h, where we find read_csr()
6:33Read freedom-e300-hifive1/platform.h
6:33Read freedom-e300-hifive1/platform.h
6:33Read freedom-e300-hifive1/platform.h
8:07Consult the manual: Memory Map, and Interrupts1
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8:07Consult the manual: Memory Map, and Interrupts1
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8:07Consult the manual: Memory Map, and Interrupts1
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11:59Continue reading plic_driver.c with a view to understanding read_csr(mhartid)
11:59Continue reading plic_driver.c with a view to understanding read_csr(mhartid)
11:59Continue reading plic_driver.c with a view to understanding read_csr(mhartid)
13:17Consult the User-Level spec on CSR instructions2
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13:17Consult the User-Level spec on CSR instructions2
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13:17Consult the User-Level spec on CSR instructions2
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19:05Atomic Read and Set Bits in CSR
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19:05Atomic Read and Set Bits in CSR
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19:05Atomic Read and Set Bits in CSR
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26:50Consult the Privileged ISA Spec on CSR 3
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26:50Consult the Privileged ISA Spec on CSR 3
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26:50Consult the Privileged ISA Spec on CSR 3
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30:30Begin to understand the csrr instruction, aided by the table of CSR addresses
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30:30Begin to understand the csrr instruction, aided by the table of CSR addresses
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30:30Begin to understand the csrr instruction, aided by the table of CSR addresses
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34:34Learn that mhartid is the "Hardware thread ID"
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34:34Learn that mhartid is the "Hardware thread ID"
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34:34Learn that mhartid is the "Hardware thread ID"
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39:56Read about the Machine-Level ISA4
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39:56Read about the Machine-Level ISA4
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39:56Read about the Machine-Level ISA4
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45:25insofaras I think the %0 refers to the _tmp variable
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45:25insofaras I think the %0 refers to the _tmp variable
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45:25insofaras I think the %0 refers to the _tmp variable
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45:59insofaras The GCC inline asm syntax is pretty weird
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45:59insofaras The GCC inline asm syntax is pretty weird
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45:59insofaras The GCC inline asm syntax is pretty weird
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46:56Summarise what read_csr(mhartid) is doing
46:56Summarise what read_csr(mhartid) is doing
46:56Summarise what read_csr(mhartid) is doing
47:33Move on to the next line of code
47:33Move on to the next line of code
47:33Move on to the next line of code
50:20The parameters that csrr takes, and what read_csr() and mhartid are
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50:20The parameters that csrr takes, and what read_csr() and mhartid are
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50:20The parameters that csrr takes, and what read_csr() and mhartid are
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53:47Discover what _AC() and PLIC_ENABLE_OFFSET() are
53:47Discover what _AC() and PLIC_ENABLE_OFFSET() are
53:47Discover what _AC() and PLIC_ENABLE_OFFSET() are
56:51Determine to consult the spec tomorrow
56:51Determine to consult the spec tomorrow
56:51Determine to consult the spec tomorrow