Jump to Content
Register Log in

RISCY BUSINESS
Blog
Forums
Episode Guide
twitter
We are currently in the process of converting the website to the new design. Some pages, like this one, are still broken. We appreciate your patience.
RISCY BUSINESS»Episode Guide
Understanding PLIC_Init & PLIC_set_threshold
References ▼
SiFive Developers
E3 Coreplex Manual
[1]3:52
SiFive Developers
Freedom E310-G000 Manual
[2]11:55
SiFive Developers
u5 Coreplex Manual
[3]32:41
Filter mode:
Topics
hardware
memory
(null topic)
Media
🗪Chat Comment
🖮Programming🟉
📖Research
🖌Whiteboard
🎭
🏟
🔗
Link to: current timestamp
Credits
Host
Neo Ar
Indexer
Matt Mascarenhas
?
?

Keyboard Navigation

Global Keys

[, < / ], > Jump to previous / next episode
W, K, P / S, J, N Jump to previous / next marker
t / T Toggle theatre / SUPERtheatre mode
V Revert filter to original state Y Select link (requires manual Ctrl-c)

Menu toggling

q Quotes r References f Filter y Link c Credits

In-Menu Movement

a
w
s
d
h j k l
←
↑
↓
→

Quotes and References Menus

Enter Jump to timecode

Quotes, References and Credits Menus

o Open URL (in new tab)

Filter Menu

x, Space Toggle category and focus next
X, ShiftSpace Toggle category and focus previous
v Invert topics / media as per focus

Filter and Link Menus

z Toggle filter / linking mode

Credits Menu

Enter Open URL (in new tab)
0:23Recap and set the stage for the day
🖌
0:23Recap and set the stage for the day
🖌
0:23Recap and set the stage for the day
🖌
1:37Determine to understand the PLIC_ENABLE_OFFSET enables
1:37Determine to understand the PLIC_ENABLE_OFFSET enables
1:37Determine to understand the PLIC_ENABLE_OFFSET enables
3:52Research the Platform-Level Interrupt Controller, Memory Map1
📖
3:52Research the Platform-Level Interrupt Controller, Memory Map1
📖
3:52Research the Platform-Level Interrupt Controller, Memory Map1
📖
6:35Research Target Interrupt Enables
📖
6:35Research Target Interrupt Enables
📖
6:35Research Target Interrupt Enables
📖
7:57demo_gpio.c number_sources passing to PLIC_init()
7:57demo_gpio.c number_sources passing to PLIC_init()
7:57demo_gpio.c number_sources passing to PLIC_init()
11:55Consult the Freedom E310-G000 Manual2 to see why PLIC_NUM_INTERRUPTS is 52
11:55Consult the Freedom E310-G000 Manual2 to see why PLIC_NUM_INTERRUPTS is 52
11:55Consult the Freedom E310-G000 Manual2 to see why PLIC_NUM_INTERRUPTS is 52
15:23Investigate why we are clearing (num_sources + 8) / 8 bytes
📖
15:23Investigate why we are clearing (num_sources + 8) / 8 bytes
📖
15:23Investigate why we are clearing (num_sources + 8) / 8 bytes
📖
19:36insofaras Is there 1 bit per interrupt?
🗪
19:36insofaras Is there 1 bit per interrupt?
🗪
19:36insofaras Is there 1 bit per interrupt?
🗪
19:43miblo Does the 3-bitness of the interrupts matter, perhaps?
🗪
19:43miblo Does the 3-bitness of the interrupts matter, perhaps?
🗪
19:43miblo Does the 3-bitness of the interrupts matter, perhaps?
🗪
20:19insofaras The + 8 / 8 seems suspiciously like a round-up to me
🗪
20:19insofaras The + 8 / 8 seems suspiciously like a round-up to me
🗪
20:19insofaras The + 8 / 8 seems suspiciously like a round-up to me
🗪
21:28Investigate why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
📖
21:28Investigate why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
📖
21:28Investigate why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
📖
22:10insofaras Yeah, it would pass 7. I mean like if you passed in a count that isn't a multiple of 8, it makes sure you clear the byte required for the left over bits
🗪
22:10insofaras Yeah, it would pass 7. I mean like if you passed in a count that isn't a multiple of 8, it makes sure you clear the byte required for the left over bits
🗪
22:10insofaras Yeah, it would pass 7. I mean like if you passed in a count that isn't a multiple of 8, it makes sure you clear the byte required for the left over bits
🗪
27:33Bit shifting up by 7, and binary values in hexadecimal
🖌
27:33Bit shifting up by 7, and binary values in hexadecimal
🖌
27:33Bit shifting up by 7, and binary values in hexadecimal
🖌
31:37insofaras I think all the interrupt enable bits are packed together in the first target, so it just needs to set 7 bytes to 0 to clear them all
🗪
31:37insofaras I think all the interrupt enable bits are packed together in the first target, so it just needs to set 7 bytes to 0 to clear them all
🗪
31:37insofaras I think all the interrupt enable bits are packed together in the first target, so it just needs to set 7 bytes to 0 to clear them all
🗪
32:41insofaras I'm going by the text in the Coreplex manual3 section 6.4, and 6.5 which says the interrupt enables use the same format as in 6.4
🗪
32:41insofaras I'm going by the text in the Coreplex manual3 section 6.4, and 6.5 which says the interrupt enables use the same format as in 6.4
🗪
32:41insofaras I'm going by the text in the Coreplex manual3 section 6.4, and 6.5 which says the interrupt enables use the same format as in 6.4
🗪
35:25Research the Interrupt Pending Bits and Target Interrupt Enables in the Freedom Everywhere's Coreplex manual
📖
35:25Research the Interrupt Pending Bits and Target Interrupt Enables in the Freedom Everywhere's Coreplex manual
📖
35:25Research the Interrupt Pending Bits and Target Interrupt Enables in the Freedom Everywhere's Coreplex manual
📖
38:47insofaras Yeah with 52 interrupts, in a packed bit array, that's 52 bits, or 7 bytes
🗪
38:47insofaras Yeah with 52 interrupts, in a packed bit array, that's 52 bits, or 7 bytes
🗪
38:47insofaras Yeah with 52 interrupts, in a packed bit array, that's 52 bits, or 7 bytes
🗪
39:23Come to fully understand why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
📖
🖌
39:23Come to fully understand why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
📖
🖌
39:23Come to fully understand why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
📖
🖌
43:22What the hart_id shifting accomplishes
🖌
43:22What the hart_id shifting accomplishes
🖌
43:22What the hart_id shifting accomplishes
🖌
45:11miblo Did we establish what "hart" stands for?
🗪
45:11miblo Did we establish what "hart" stands for?
🗪
45:11miblo Did we establish what "hart" stands for?
🗪
45:34insofaras Oh, wait, in the Terminology section it says: HARdware Thread
🗪
45:34insofaras Oh, wait, in the Terminology section it says: HARdware Thread
🗪
45:34insofaras Oh, wait, in the Terminology section it says: HARdware Thread
🗪
46:19Consult the Terminology section in the Coreplex manual
📖
46:19Consult the Terminology section in the Coreplex manual
📖
46:19Consult the Terminology section in the Coreplex manual
📖
49:26popcorn0x90 HiFive1 doesn't look that big
🗪
49:26popcorn0x90 HiFive1 doesn't look that big
🗪
49:26popcorn0x90 HiFive1 doesn't look that big
🗪
50:01Note HARdware Thread and the computation of the interrupt size clearing
🖌
50:01Note HARdware Thread and the computation of the interrupt size clearing
🖌
50:01Note HARdware Thread and the computation of the interrupt size clearing
🖌
53:36Come to understand how the setting of all priorities to 0 is being accomplished
📖
53:36Come to understand how the setting of all priorities to 0 is being accomplished
📖
53:36Come to understand how the setting of all priorities to 0 is being accomplished
📖
57:54Come to understand how the setting of the threshold to 0 is being accomplished
📖
57:54Come to understand how the setting of the threshold to 0 is being accomplished
📖
57:54Come to understand how the setting of the threshold to 0 is being accomplished
📖
1:04:34Swiftly read PLIC_set_threshold(), before moving on to PLIC_enable_interrupt()
📖
1:04:34Swiftly read PLIC_set_threshold(), before moving on to PLIC_enable_interrupt()
📖
1:04:34Swiftly read PLIC_set_threshold(), before moving on to PLIC_enable_interrupt()
📖
1:05:47Determine to take a closer look at PLIC_enable_interrupt()
1:05:47Determine to take a closer look at PLIC_enable_interrupt()
1:05:47Determine to take a closer look at PLIC_enable_interrupt()