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RISCY BUSINESS»Episode Guide
Understanding PLIC_Init & PLIC_set_threshold
References ▼
SiFive Developers
E3 Coreplex Manual
[1]3:52
SiFive Developers
Freedom E310-G000 Manual
[2]11:55
SiFive Developers
u5 Coreplex Manual
[3]32:41
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0:23Recap and set the stage for the day
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0:23Recap and set the stage for the day
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0:23Recap and set the stage for the day
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1:37Determine to understand the PLIC_ENABLE_OFFSET enables
1:37Determine to understand the PLIC_ENABLE_OFFSET enables
1:37Determine to understand the PLIC_ENABLE_OFFSET enables
3:52Research the Platform-Level Interrupt Controller, Memory Map1
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3:52Research the Platform-Level Interrupt Controller, Memory Map1
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3:52Research the Platform-Level Interrupt Controller, Memory Map1
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6:35Research Target Interrupt Enables
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6:35Research Target Interrupt Enables
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6:35Research Target Interrupt Enables
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7:57demo_gpio.c number_sources passing to PLIC_init()
7:57demo_gpio.c number_sources passing to PLIC_init()
7:57demo_gpio.c number_sources passing to PLIC_init()
11:55Consult the Freedom E310-G000 Manual2 to see why PLIC_NUM_INTERRUPTS is 52
11:55Consult the Freedom E310-G000 Manual2 to see why PLIC_NUM_INTERRUPTS is 52
11:55Consult the Freedom E310-G000 Manual2 to see why PLIC_NUM_INTERRUPTS is 52
15:23Investigate why we are clearing (num_sources + 8) / 8 bytes
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15:23Investigate why we are clearing (num_sources + 8) / 8 bytes
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15:23Investigate why we are clearing (num_sources + 8) / 8 bytes
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19:36insofaras Is there 1 bit per interrupt?
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19:36insofaras Is there 1 bit per interrupt?
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19:36insofaras Is there 1 bit per interrupt?
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19:43miblo Does the 3-bitness of the interrupts matter, perhaps?
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19:43miblo Does the 3-bitness of the interrupts matter, perhaps?
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19:43miblo Does the 3-bitness of the interrupts matter, perhaps?
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20:19insofaras The + 8 / 8 seems suspiciously like a round-up to me
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20:19insofaras The + 8 / 8 seems suspiciously like a round-up to me
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20:19insofaras The + 8 / 8 seems suspiciously like a round-up to me
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21:28Investigate why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
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21:28Investigate why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
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21:28Investigate why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
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22:10insofaras Yeah, it would pass 7. I mean like if you passed in a count that isn't a multiple of 8, it makes sure you clear the byte required for the left over bits
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22:10insofaras Yeah, it would pass 7. I mean like if you passed in a count that isn't a multiple of 8, it makes sure you clear the byte required for the left over bits
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22:10insofaras Yeah, it would pass 7. I mean like if you passed in a count that isn't a multiple of 8, it makes sure you clear the byte required for the left over bits
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27:33Bit shifting up by 7, and binary values in hexadecimal
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27:33Bit shifting up by 7, and binary values in hexadecimal
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27:33Bit shifting up by 7, and binary values in hexadecimal
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31:37insofaras I think all the interrupt enable bits are packed together in the first target, so it just needs to set 7 bytes to 0 to clear them all
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31:37insofaras I think all the interrupt enable bits are packed together in the first target, so it just needs to set 7 bytes to 0 to clear them all
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31:37insofaras I think all the interrupt enable bits are packed together in the first target, so it just needs to set 7 bytes to 0 to clear them all
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32:41insofaras I'm going by the text in the Coreplex manual3 section 6.4, and 6.5 which says the interrupt enables use the same format as in 6.4
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32:41insofaras I'm going by the text in the Coreplex manual3 section 6.4, and 6.5 which says the interrupt enables use the same format as in 6.4
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32:41insofaras I'm going by the text in the Coreplex manual3 section 6.4, and 6.5 which says the interrupt enables use the same format as in 6.4
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35:25Research the Interrupt Pending Bits and Target Interrupt Enables in the Freedom Everywhere's Coreplex manual
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35:25Research the Interrupt Pending Bits and Target Interrupt Enables in the Freedom Everywhere's Coreplex manual
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35:25Research the Interrupt Pending Bits and Target Interrupt Enables in the Freedom Everywhere's Coreplex manual
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38:47insofaras Yeah with 52 interrupts, in a packed bit array, that's 52 bits, or 7 bytes
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38:47insofaras Yeah with 52 interrupts, in a packed bit array, that's 52 bits, or 7 bytes
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38:47insofaras Yeah with 52 interrupts, in a packed bit array, that's 52 bits, or 7 bytes
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39:23Come to fully understand why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
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39:23Come to fully understand why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
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39:23Come to fully understand why we are shifting up the hart_id by PLIC_ENABLE_SHIFT_PER_TARGET
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43:22What the hart_id shifting accomplishes
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43:22What the hart_id shifting accomplishes
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43:22What the hart_id shifting accomplishes
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45:11miblo Did we establish what "hart" stands for?
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45:11miblo Did we establish what "hart" stands for?
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45:11miblo Did we establish what "hart" stands for?
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45:34insofaras Oh, wait, in the Terminology section it says: HARdware Thread
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45:34insofaras Oh, wait, in the Terminology section it says: HARdware Thread
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45:34insofaras Oh, wait, in the Terminology section it says: HARdware Thread
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46:19Consult the Terminology section in the Coreplex manual
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46:19Consult the Terminology section in the Coreplex manual
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46:19Consult the Terminology section in the Coreplex manual
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49:26popcorn0x90 HiFive1 doesn't look that big
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49:26popcorn0x90 HiFive1 doesn't look that big
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49:26popcorn0x90 HiFive1 doesn't look that big
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50:01Note HARdware Thread and the computation of the interrupt size clearing
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50:01Note HARdware Thread and the computation of the interrupt size clearing
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50:01Note HARdware Thread and the computation of the interrupt size clearing
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53:36Come to understand how the setting of all priorities to 0 is being accomplished
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53:36Come to understand how the setting of all priorities to 0 is being accomplished
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53:36Come to understand how the setting of all priorities to 0 is being accomplished
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57:54Come to understand how the setting of the threshold to 0 is being accomplished
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57:54Come to understand how the setting of the threshold to 0 is being accomplished
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57:54Come to understand how the setting of the threshold to 0 is being accomplished
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1:04:34Swiftly read PLIC_set_threshold(), before moving on to PLIC_enable_interrupt()
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1:04:34Swiftly read PLIC_set_threshold(), before moving on to PLIC_enable_interrupt()
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1:04:34Swiftly read PLIC_set_threshold(), before moving on to PLIC_enable_interrupt()
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1:05:47Determine to take a closer look at PLIC_enable_interrupt()
1:05:47Determine to take a closer look at PLIC_enable_interrupt()
1:05:47Determine to take a closer look at PLIC_enable_interrupt()