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RISCY BUSINESS»Episode Guide
Andrew Waterman & Yunsup Lee Interview
References ▼
RISC-V
User-Level ISA Specification v2.1
[1]28:53
David Patterson & John Hennessy (Morgan Kaufmann)
Computer Organization and Design MIPS Edition
[2]28:53
John Hennessy & David Patterson (Morgan Kaufmann)
Computer Architecture: A Quantitative Approach
[3]28:53
University of California, Berkeley
Great Ideas in Computer Architecture (Machine Structures)
[4]35:45
SiFive Forums
[5]35:57
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Host
Neo Ar
Guest
Yunsup Lee
Guest
Andrew Waterman
Indexer
Matt Mascarenhas
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0:01Neo Ar: Welcome and introduce Andrew Waterman & Yunsup Lee
0:01Neo Ar: Welcome and introduce Andrew Waterman & Yunsup Lee
0:01Neo Ar: Welcome and introduce Andrew Waterman & Yunsup Lee
1:07NA: A highlight reel of life stories before RISC-V
1:07NA: A highlight reel of life stories before RISC-V
1:07NA: A highlight reel of life stories before RISC-V
1:22Andrew Waterman: Life before RISC-V
1:22Andrew Waterman: Life before RISC-V
1:22Andrew Waterman: Life before RISC-V
2:46Yunsup Lee: Life before RISC-V
2:46Yunsup Lee: Life before RISC-V
2:46Yunsup Lee: Life before RISC-V
4:18NA: Why decide to create a new ISA?
4:18NA: Why decide to create a new ISA?
4:18NA: Why decide to create a new ISA?
4:33AW: On creating a simple basis for performing research
4:33AW: On creating a simple basis for performing research
4:33AW: On creating a simple basis for performing research
6:23YL: On removing complexity in order to enable development by small teams
6:23YL: On removing complexity in order to enable development by small teams
6:23YL: On removing complexity in order to enable development by small teams
7:12NA: What drew you specifically to RISC?
7:12NA: What drew you specifically to RISC?
7:12NA: What drew you specifically to RISC?
7:34YL: Necessity
7:34YL: Necessity
7:34YL: Necessity
8:39AW: On following RISC I and RISC II
8:39AW: On following RISC I and RISC II
8:39AW: On following RISC I and RISC II
9:16NA: What appealed to you about having it be open hardware?
9:16NA: What appealed to you about having it be open hardware?
9:16NA: What appealed to you about having it be open hardware?
9:32YL: Openness enables understanding and learning
9:32YL: Openness enables understanding and learning
9:32YL: Openness enables understanding and learning
10:41AW: On finding encouragement in the competition of ideas in the open source community
10:41AW: On finding encouragement in the competition of ideas in the open source community
10:41AW: On finding encouragement in the competition of ideas in the open source community
12:57YL: On the potential for open hardware enabling schools to teach what the industry actually uses
12:57YL: On the potential for open hardware enabling schools to teach what the industry actually uses
12:57YL: On the potential for open hardware enabling schools to teach what the industry actually uses
13:36NA: What are you hoping to see happen in the world of RISC-V?
13:36NA: What are you hoping to see happen in the world of RISC-V?
13:36NA: What are you hoping to see happen in the world of RISC-V?
13:51AW: A RISC ISA is suitable for many domains of computing, from the lowest to the highest performing computing
13:51AW: A RISC ISA is suitable for many domains of computing, from the lowest to the highest performing computing
13:51AW: A RISC ISA is suitable for many domains of computing, from the lowest to the highest performing computing
15:15YL: On the need for customisation with the end of Moore's Law
15:15YL: On the need for customisation with the end of Moore's Law
15:15YL: On the need for customisation with the end of Moore's Law
16:01NA: Do you think RISC-V being in anything and everything is an attainable goal, and what markets may RISC-V most thrive in?
16:01NA: Do you think RISC-V being in anything and everything is an attainable goal, and what markets may RISC-V most thrive in?
16:01NA: Do you think RISC-V being in anything and everything is an attainable goal, and what markets may RISC-V most thrive in?
16:24AW: Embedded systems contain all sorts of chips
16:24AW: Embedded systems contain all sorts of chips
16:24AW: Embedded systems contain all sorts of chips
17:21YL: New markets
17:21YL: New markets
17:21YL: New markets
18:23hossein1387 My question is, considering the huge investment that is currently happening in custom chips for AI, how do you think SiFive can attract investors in the field of AI to pay more attention to your platform?
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18:23hossein1387 My question is, considering the huge investment that is currently happening in custom chips for AI, how do you think SiFive can attract investors in the field of AI to pay more attention to your platform?
🗪
18:23hossein1387 My question is, considering the huge investment that is currently happening in custom chips for AI, how do you think SiFive can attract investors in the field of AI to pay more attention to your platform?
🗪
18:50YL: Customisable chips may well serve machine learning research
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18:50YL: Customisable chips may well serve machine learning research
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18:50YL: Customisable chips may well serve machine learning research
📖
20:27AW: Evaluation of neural networks will frequently be done in energy constrained environments
20:27AW: Evaluation of neural networks will frequently be done in energy constrained environments
20:27AW: Evaluation of neural networks will frequently be done in energy constrained environments
21:11NA: Can you tell us a bit about SiFive in terms of what they offer customers?
21:11NA: Can you tell us a bit about SiFive in terms of what they offer customers?
21:11NA: Can you tell us a bit about SiFive in terms of what they offer customers?
21:29YL: Democratising access to custom silicon
21:29YL: Democratising access to custom silicon
21:29YL: Democratising access to custom silicon
23:07AW: On the expense of building custom chips using a proprietary ISA
23:07AW: On the expense of building custom chips using a proprietary ISA
23:07AW: On the expense of building custom chips using a proprietary ISA
24:46NA: What are the coolest HiFive1 projects you've seen?
24:46NA: What are the coolest HiFive1 projects you've seen?
24:46NA: What are the coolest HiFive1 projects you've seen?
25:01YL: Printer controller and Zephyr port
25:01YL: Printer controller and Zephyr port
25:01YL: Printer controller and Zephyr port
26:30AW: On the community porting the realtime Zephyr operating system to the HiFive1
26:30AW: On the community porting the realtime Zephyr operating system to the HiFive1
26:30AW: On the community porting the realtime Zephyr operating system to the HiFive1
27:12NA: Will SiFive release products using Freedom Unleashed?
27:12NA: Will SiFive release products using Freedom Unleashed?
27:12NA: Will SiFive release products using Freedom Unleashed?
27:30YL: Why build the HiFive1 board
27:30YL: Why build the HiFive1 board
27:30YL: Why build the HiFive1 board
28:22AW: Excitement for a Unix capable RISC-V system coming out relatively soon
28:22AW: Excitement for a Unix capable RISC-V system coming out relatively soon
28:22AW: Excitement for a Unix capable RISC-V system coming out relatively soon
28:41NA: Any resources to recommend for learning about RISC-V or open hardware in general?
28:41NA: Any resources to recommend for learning about RISC-V or open hardware in general?
28:41NA: Any resources to recommend for learning about RISC-V or open hardware in general?
28:53AW: The RISC-V User-Level ISA Specification1 and two text books coming out this year based on Computer Organization and Design2 and Computer Architecture: A Quantitative Approach3
28:53AW: The RISC-V User-Level ISA Specification1 and two text books coming out this year based on Computer Organization and Design2 and Computer Architecture: A Quantitative Approach3
28:53AW: The RISC-V User-Level ISA Specification1 and two text books coming out this year based on Computer Organization and Design2 and Computer Architecture: A Quantitative Approach3
29:55YL: Graduate-level course at Berkeley
29:55YL: Graduate-level course at Berkeley
29:55YL: Graduate-level course at Berkeley
31:25AW: Plug Berkeley's use of RISC-V in the classroom
31:25AW: Plug Berkeley's use of RISC-V in the classroom
31:25AW: Plug Berkeley's use of RISC-V in the classroom
32:05NA: What advice do you have for those looking to get involved in the RISC-V community?
32:05NA: What advice do you have for those looking to get involved in the RISC-V community?
32:05NA: What advice do you have for those looking to get involved in the RISC-V community?
32:24YL: If you want to learn how computers work, RISC-V is a good resource
32:24YL: If you want to learn how computers work, RISC-V is a good resource
32:24YL: If you want to learn how computers work, RISC-V is a good resource
34:27AW: There's a lot of work to be done on compilers, operating systems, software, microarchitecture, etc
34:27AW: There's a lot of work to be done on compilers, operating systems, software, microarchitecture, etc
34:27AW: There's a lot of work to be done on compilers, operating systems, software, microarchitecture, etc
35:04hossein1387 Is there any plan for MOOC (massive online open courses)?
🗪
35:04hossein1387 Is there any plan for MOOC (massive online open courses)?
🗪
35:04hossein1387 Is there any plan for MOOC (massive online open courses)?
🗪
35:45AW: On Berkeley possibly teaching CS61C as an online course4
35:45AW: On Berkeley possibly teaching CS61C as an online course4
35:45AW: On Berkeley possibly teaching CS61C as an online course4
35:57NA: Point out the SiFive Forums as a good resource5
35:57NA: Point out the SiFive Forums as a good resource5
35:57NA: Point out the SiFive Forums as a good resource5
36:12AW: Shout-out to Megan Wachs
36:12AW: Shout-out to Megan Wachs
36:12AW: Shout-out to Megan Wachs
36:35NA: Give it a minute to see if some questions pop up
36:35NA: Give it a minute to see if some questions pop up
36:35NA: Give it a minute to see if some questions pop up
37:38NA: Suppose that is everything, but wait...
37:38NA: Suppose that is everything, but wait...
37:38NA: Suppose that is everything, but wait...
37:59hossein1387 What is your answer to Linus Torvalds when he said ISA is not important and it's the community around ISA that matters?
🗪
37:59hossein1387 What is your answer to Linus Torvalds when he said ISA is not important and it's the community around ISA that matters?
🗪
37:59hossein1387 What is your answer to Linus Torvalds when he said ISA is not important and it's the community around ISA that matters?
🗪
38:15AW: On ISAs not mattering, especially in high end computing
38:15AW: On ISAs not mattering, especially in high end computing
38:15AW: On ISAs not mattering, especially in high end computing
39:28YL: Why not RISC-V if instruction sets don't matter?
39:28YL: Why not RISC-V if instruction sets don't matter?
39:28YL: Why not RISC-V if instruction sets don't matter?
39:50AW: It takes a village, so if you have resources to help port to RISC-V, pitch in!
39:50AW: It takes a village, so if you have resources to help port to RISC-V, pitch in!
39:50AW: It takes a village, so if you have resources to help port to RISC-V, pitch in!
40:03Miblo I missed the start, but I was wondering: Do you personally have anything you'd like to see RISC-V users do that isn't necessarily endorsed or endorsable by SiFive?
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40:03Miblo I missed the start, but I was wondering: Do you personally have anything you'd like to see RISC-V users do that isn't necessarily endorsed or endorsable by SiFive?
🗪
40:03Miblo I missed the start, but I was wondering: Do you personally have anything you'd like to see RISC-V users do that isn't necessarily endorsed or endorsable by SiFive?
🗪
40:28AW: The more implementations there are, the better the project will be for everyone
40:28AW: The more implementations there are, the better the project will be for everyone
40:28AW: The more implementations there are, the better the project will be for everyone
41:43YL: It gets stronger the more people look at it
41:43YL: It gets stronger the more people look at it
41:43YL: It gets stronger the more people look at it
42:57NA: That's the end for real
42:57NA: That's the end for real
42:57NA: That's the end for real