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RISCY BUSINESS»Episode Guide
Studying the PLIC
References ▼
SiFive Developers
HiFive1 Schematics
[1]0:49
SiFive Developers
Platform Reference Manual
[2]0:49
SiFive Developers
E3 Coreplex Manual
[3]0:49
RISC-V
Draft Privileged ISA Specification v1.9.1
[4]3:32
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Neo Ar
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Matt Mascarenhas
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0:10Recap and set the stage for the day
0:10Recap and set the stage for the day
0:10Recap and set the stage for the day
0:49Consult the HiFive1 schematics1, the Platform Reference Manual2 and the E3 Coreplex Manual3
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0:49Consult the HiFive1 schematics1, the Platform Reference Manual2 and the E3 Coreplex Manual3
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0:49Consult the HiFive1 schematics1, the Platform Reference Manual2 and the E3 Coreplex Manual3
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3:32Read about the Platform-Level Interrupt Controller in the RISC-V Privileged spec4
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3:32Read about the Platform-Level Interrupt Controller in the RISC-V Privileged spec4
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3:32Read about the Platform-Level Interrupt Controller in the RISC-V Privileged spec4
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6:55Summarise this paragraph
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6:55Summarise this paragraph
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6:55Summarise this paragraph
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10:54Research Local interrupt sources
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10:54Research Local interrupt sources
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10:54Research Local interrupt sources
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13:41Note that there are a number of registers relating to interrupt sources, all starting with an "m", with a few words on information seeping in
13:41Note that there are a number of registers relating to interrupt sources, all starting with an "m", with a few words on information seeping in
13:41Note that there are a number of registers relating to interrupt sources, all starting with an "m", with a few words on information seeping in
15:09Research Global interrupt sources
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15:09Research Global interrupt sources
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15:09Research Global interrupt sources
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16:25Research Interrupt Targets and Hart Contexts
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16:25Research Interrupt Targets and Hart Contexts
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16:25Research Interrupt Targets and Hart Contexts
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20:18Research Controlling Access to the PLIC and PLIC Core Specification
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20:18Research Controlling Access to the PLIC and PLIC Core Specification
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20:18Research Controlling Access to the PLIC and PLIC Core Specification
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24:14Research Interrupt Flow
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24:14Research Interrupt Flow
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24:14Research Interrupt Flow
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28:27Summarise the idea of the interrupt flow processing
28:27Summarise the idea of the interrupt flow processing
28:27Summarise the idea of the interrupt flow processing
31:23Correct a typo in the notes
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31:23Correct a typo in the notes
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31:23Correct a typo in the notes
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33:02Platform-Level Interrupt Controller
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33:02Platform-Level Interrupt Controller
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33:02Platform-Level Interrupt Controller
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43:42Research Interrupt Enables
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43:42Research Interrupt Enables
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43:42Research Interrupt Enables
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48:16Research Interrupt Priorities
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48:16Research Interrupt Priorities
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48:16Research Interrupt Priorities
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51:50Research Interrupt Priority Thresholds
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51:50Research Interrupt Priority Thresholds
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51:50Research Interrupt Priority Thresholds
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54:22Research Platform-Level Interrupt Controller in the E3 Coreplex Manual
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54:22Research Platform-Level Interrupt Controller in the E3 Coreplex Manual
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54:22Research Platform-Level Interrupt Controller in the E3 Coreplex Manual
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57:18Explore the PLIC code to see how it corresponds with our newly acquired knowledge
57:18Explore the PLIC code to see how it corresponds with our newly acquired knowledge
57:18Explore the PLIC code to see how it corresponds with our newly acquired knowledge
1:01:07We're out of time
1:01:07We're out of time
1:01:07We're out of time