Studying the Machine Interrupt Registers
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0:06Recap and set the stage for the day
0:06Recap and set the stage for the day
0:06Recap and set the stage for the day
0:51Intuition on two's complement
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0:51Intuition on two's complement
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0:51Intuition on two's complement
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4:10We are counting with zeroes
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4:10We are counting with zeroes
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4:10We are counting with zeroes
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9:03Revisit instructions.scala1 and research register-transfer level2
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9:03Revisit instructions.scala1 and research register-transfer level2
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9:03Revisit instructions.scala1 and research register-transfer level2
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15:55Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread3
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15:55Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread3
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15:55Come to understand how to specify that rs1 represents an immediate or a register, thanks to the reply to the "Confusion Regarding Freedom E SDK inline asm" forum thread3
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18:25Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints
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18:25Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints
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18:25Read clear_csr() to put csrrc into perspective with our new understanding of pseudo-instructions and the i vs r hints
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22:24Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification4
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22:24Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification4
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22:24Read about CSRRCI in the CSR Instructions section of the User-Level ISA Specification4
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23:05Walk through clear_csr() again
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23:05Walk through clear_csr() again
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23:05Walk through clear_csr() again
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28:53GNU Assembly Syntax: Constraints and Syntax5
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28:53GNU Assembly Syntax: Constraints and Syntax5
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28:53GNU Assembly Syntax: Constraints and Syntax5
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35:15Continue reading clear_csr()
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35:15Continue reading clear_csr()
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35:15Continue reading clear_csr()
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40:21Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses6
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40:21Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses6
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40:21Pop back up to the top of the stack, to reset_demo(), and read about the currently allocated RISC-V machine-level CSR addresses6
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44:11Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register
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44:11Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register
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44:11Read about Machine Interrupt Registers, including the mie (machine interrupt-enable) register
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49:26Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts
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49:26Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts
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49:26Note how common it is in plic_driver.c for us to compute an address of a memory mapped register in order to mess with interrupts
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51:45A few words on the sponge mode that we're in
51:45A few words on the sponge mode that we're in
51:45A few words on the sponge mode that we're in
52:50Continue reading about the Machine Interrupt Registers
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52:50Continue reading about the Machine Interrupt Registers
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52:50Continue reading about the Machine Interrupt Registers
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58:33Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation
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58:33Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation
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58:33Return to demo_gpio.c and come to understand the clear_csr() calls in relation to the documentation
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1:06:48We're out of time for today
1:06:48We're out of time for today
1:06:48We're out of time for today